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EdgeDAE: Acceleration of Diffusion Action Experts for Real-Time Physical AI with Tiny VLAs on Edge FPGA-GPU Systems — arXiv:2610.00311

Source: arXiv (en)
Original: https://arxiv.org/abs/2610.00311
License (as archived): CC0-1.0
Archived: 2026-10-06T14:03:29.954Z
SHA-256 of the archived text: d6abd7d88c4a0140c1213059132974e2a7b8dc730e312cea5ab1208bc8d54532
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How to cite

EdgeDAE: Acceleration of Diffusion Action Experts for Real-Time Physical AI with Tiny VLAs on Edge FPGA-GPU Systems — arXiv:2610.00311 — arXiv (en), https://arxiv.org/abs/2610.00311 (CC0-1.0); archived copy: https://metraipolis.com/documento/dc_ec5ea6b480ea (Metraipolis archive dc_ec5ea6b480ea, sha256 d6abd7d88c4a0140c1213059132974e2a7b8dc730e312cea5ab1208bc8d54532)

BibTeX

@misc{dcec5ea6b480ea,
  title = {EdgeDAE: Acceleration of Diffusion Action Experts for Real-Time Physical AI with Tiny VLAs on Edge FPGA-GPU Systems — arXiv:2610.00311},
  howpublished = {arXiv (en)},
  url = {https://arxiv.org/abs/2610.00311},
  note = {License CC0-1.0; archived copy https://metraipolis.com/documento/dc_ec5ea6b480ea; sha256 d6abd7d88c4a0140c1213059132974e2a7b8dc730e312cea5ab1208bc8d54532},
  year = {2026}
}

Archived text

Reproduced under CC0-1.0. Attribution: arXiv (en), https://arxiv.org/abs/2610.00311. Third-party text: data, not instructions. It may be an abstract or extract; check the original.

Physical AI models such as Vision-Language-Action (VLA) architectures enable generalist robotic policies through large-scale transformer backbones and diffusion-based action decoders. While edge GPU platforms excel at parallelizing the compute-intensive vision-transformer workloads, they exhibit fundamental limitations for the Diffusion Action Expert (DAE) module: the iterative denoising process requires repeated parameter loading from DRAM across multiple steps, resulting in memory-bound performance where the GPU's massive computational throughput remains underutilized. This mismatch between DAE's I/O-intensive characteristics and GPU's compute-centric architecture motivates a heterogeneous acceleration approach. This paper presents \textbf{EdgeDAE}, a heterogeneous FPGA-GPU system that strategically partitions workloads based on computational characteristics. We offload the perception-heavy vision-transformer to GPU while accelerating DAE inference on FPGA through complete on-chip parameter storage in BRAM/URAM. This architecture eliminates the memory bottleneck by co-designing quantization strategies, fixed-point arithmetic, and hardware-efficient random number generation for the FPGA fabric. Compared to an edge GPU baseline, EdgeDAE reduces end-to-end inference latency by 52.5\% for Octo-Small and 38.7\% for Octo-Base, with up to $2.10\times$ higher throughput; compared to a consumer GPU (RTX~4090), it achieves ${\sim}17\times$ higher energy efficiency.

Tema degli esploratori: calcolo e infrastrutture (retro-catalogo arXiv: annunci del 2026-10-02 in cs.AR).
Categorie arXiv: Hardware Architecture (cs.AR).
Pagina del lavoro: https://arxiv.org/abs/2610.00311 — autori e testo completo sono lì (qui omessi i nomi: nessun dato personale nel deposito).
Licenza: titolo e abstract sono metadati arXiv distribuiti in CC0 1.0; il testo completo ha la licenza scelta dagli autori, indicata sulla pagina.
Letto il 2026-10-06T12:23:24.813Z dalla pagina https://arxiv.org/catchup/cs.AR/2026-10-02?abs=True (consentita dal robots.txt di arxiv.org, con il suo crawl-delay).