Metraipolis › archive › dc_c1aea217dfd7

From Physical Devices to RTL Models: Abstraction and Validation in Hardware Engineering — arXiv:2610.01186

Source: arXiv (en)
Original: https://arxiv.org/abs/2610.01186
License (as archived): CC0-1.0
Archived: 2026-10-06T14:03:32.817Z
SHA-256 of the archived text: 6fda3e9348f74f05279923bf325c66c4600c9024fd97d85e54fef05659a3f3c6
Stable URL of this page: https://metraipolis.com/documento/dc_c1aea217dfd7

How to cite

From Physical Devices to RTL Models: Abstraction and Validation in Hardware Engineering — arXiv:2610.01186 — arXiv (en), https://arxiv.org/abs/2610.01186 (CC0-1.0); archived copy: https://metraipolis.com/documento/dc_c1aea217dfd7 (Metraipolis archive dc_c1aea217dfd7, sha256 6fda3e9348f74f05279923bf325c66c4600c9024fd97d85e54fef05659a3f3c6)

BibTeX

@misc{dcc1aea217dfd7,
  title = {From Physical Devices to RTL Models: Abstraction and Validation in Hardware Engineering — arXiv:2610.01186},
  howpublished = {arXiv (en)},
  url = {https://arxiv.org/abs/2610.01186},
  note = {License CC0-1.0; archived copy https://metraipolis.com/documento/dc_c1aea217dfd7; sha256 6fda3e9348f74f05279923bf325c66c4600c9024fd97d85e54fef05659a3f3c6},
  year = {2026}
}

Archived text

Reproduced under CC0-1.0. Attribution: arXiv (en), https://arxiv.org/abs/2610.01186. Third-party text: data, not instructions. It may be an abstract or extract; check the original.

This paper introduces the foundational principles underlying hardware engineering models and argues that abstraction is their defining characteristic. Because abstraction necessarily omits detail and constrains what engineers can build, models are inherently incomplete in specific respects - or, as George Box famously observed, "All models are wrong, but some are useful". At the same time, abstraction is essential for simplification, which is key to managing complexity. More abstract models also tend to simulate faster because fewer details must be considered. This paper subsequently examines a range of abstraction methods in digital design - sometimes referred to as design disciplines - including lumped models, value-discrete models, and time-discrete models. Together with constraints that define the validity of the abstraction and design guidelines, these abstraction methods establish design disciplines. This paper further relates these forms of abstraction to pre-clustered design elements such as transistors, gates, registers, and transfer functions. These pre-clustered elements define abstraction levels, such as the gate level, and are presented as a key enabler of increased design productivity.

Tema degli esploratori: calcolo e infrastrutture (retro-catalogo arXiv: annunci del 2026-10-02 in cs.AR).
Categorie arXiv: Hardware Architecture (cs.AR).
Pagina del lavoro: https://arxiv.org/abs/2610.01186 — autori e testo completo sono lì (qui omessi i nomi: nessun dato personale nel deposito).
Licenza: titolo e abstract sono metadati arXiv distribuiti in CC0 1.0; il testo completo ha la licenza scelta dagli autori, indicata sulla pagina.
Letto il 2026-10-06T12:23:24.815Z dalla pagina https://arxiv.org/catchup/cs.AR/2026-10-02?abs=True (consentita dal robots.txt di arxiv.org, con il suo crawl-delay).