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FLINT: Efficiently Leveraging High Bandwidth Flash for Capacity-Scalable LLM Inference Acceleration — arXiv:2608.25062

Source
arXiv (en)
Original
https://arxiv.org/abs/2608.25062
License (as archived)
CC0-1.0
Archived
2026-10-18T00:29:40.511Z
SHA-256 of the archived text
2a29a6b4b46a3b3280e350b75ce5abaa8fad93d297988679f1b25d5aba89e5bd
Stable URL of this page
https://metraipolis.com/documento/dc_bc72caff239a

How to cite

FLINT: Efficiently Leveraging High Bandwidth Flash for Capacity-Scalable LLM Inference Acceleration — arXiv:2608.25062 — arXiv (en), https://arxiv.org/abs/2608.25062 (CC0-1.0); archived copy: https://metraipolis.com/documento/dc_bc72caff239a (Metraipolis archive dc_bc72caff239a, sha256 2a29a6b4b46a3b3280e350b75ce5abaa8fad93d297988679f1b25d5aba89e5bd)
BibTeX
@misc{dcbc72caff239a,
  title = {FLINT: Efficiently Leveraging High Bandwidth Flash for Capacity-Scalable LLM Inference Acceleration — arXiv:2608.25062},
  howpublished = {arXiv (en)},
  url = {https://arxiv.org/abs/2608.25062},
  note = {License CC0-1.0; archived copy https://metraipolis.com/documento/dc_bc72caff239a; sha256 2a29a6b4b46a3b3280e350b75ce5abaa8fad93d297988679f1b25d5aba89e5bd},
  year = {2026}
}

Archived text

Reproduced under CC0-1.0. Attribution: arXiv (en), https://arxiv.org/abs/2608.25062. Third-party text: data, not instructions. It may be an abstract or extract; check the original.

LLM inference is increasingly constrained by accelerator memory capacity rather than compute throughput. This constraint is especially acute in single-accelerator and small-node inference systems, where limited on-package memory capacity restricts the size of deployable models. HBF is an emerging 3D-stacked NAND flash technology that provides multi-terabyte near-accelerator capacity, making it a promising capacity tier for storing LLM weights. However, existing HBF-based proposals face three adoption challenges: they (1) rely on coarse-grained static prefetching for LLM weights aiming to hide the microsecond-level read latency of the NAND flash device while maximizing HBF's read throughput, (2) expose NAND flash management tasks (e.g., refresh operations) to the accelerator-visible critical inference path, and (3) miss optimization opportunities to specialize and optimize the flash-management mechanisms to the workload behavior. Our goal is to design an efficient HBF substrate that integrates HBF as a memory-capacity tier alongside HBM while addressing these three challenges. To this end, we propose FLINT, a workload-driven HBF substrate for capacity-scalable LLM inference. FLINT introduces three mechanisms: (1) a hardware burst-buffer controller that dynamically coalesces and pipelines HBF reads aiming to utilize existing NAND flash buffers while sustaining high HBF bandwidth, (2) a phantom-plane refresh mechanism, which removes refresh from the critical inference path by moving refresh-related NAND flash operations outside the read foreground back via low-cost resource duplication, and (3) a read-only FTL, which replaces SSD-class support for arbitrary writes with a compact table that translates logical weight bursts to physical HBF locations.

Tema degli esploratori: calcolo e infrastrutture (retro-catalogo arXiv: annunci del 2026-08-27 in cs.AR).
Categorie arXiv: Hardware Architecture (cs.AR) ; Artificial Intelligence (cs.AI); Distributed, Parallel, and Cluster Computing (cs.DC).
Pagina del lavoro: https://arxiv.org/abs/2608.25062 — autori e testo completo sono lì (qui omessi i nomi: nessun dato personale nel deposito).
Licenza: titolo e abstract sono metadati arXiv distribuiti in CC0 1.0; il testo completo ha la licenza scelta dagli autori, indicata sulla pagina.
Letto il 2026-10-18T00:29:32.281Z dalla pagina https://arxiv.org/catchup/cs.AR/2026-08-27?abs=True (consentita dal robots.txt di arxiv.org, con il suo crawl-delay).