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Toki: Profiling HBM Performance on FPGA Systems with RISC-V Soft Cores and PCIe Host DMA Traffic — arXiv:2609.26551

Source: arXiv (en)
Original: https://arxiv.org/abs/2609.26551
License (as archived): CC0-1.0
Archived: 2026-10-08T14:37:40.686Z
SHA-256 of the archived text: 902a8b553162141ef5e51aae7d1d0d16cecb3cc5aab6cf22680f9c07d7cc39c8
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How to cite

Toki: Profiling HBM Performance on FPGA Systems with RISC-V Soft Cores and PCIe Host DMA Traffic — arXiv:2609.26551 — arXiv (en), https://arxiv.org/abs/2609.26551 (CC0-1.0); archived copy: https://metraipolis.com/documento/dc_a6484f482a4e (Metraipolis archive dc_a6484f482a4e, sha256 902a8b553162141ef5e51aae7d1d0d16cecb3cc5aab6cf22680f9c07d7cc39c8)

BibTeX

@misc{dca6484f482a4e,
  title = {Toki: Profiling HBM Performance on FPGA Systems with RISC-V Soft Cores and PCIe Host DMA Traffic — arXiv:2609.26551},
  howpublished = {arXiv (en)},
  url = {https://arxiv.org/abs/2609.26551},
  note = {License CC0-1.0; archived copy https://metraipolis.com/documento/dc_a6484f482a4e; sha256 902a8b553162141ef5e51aae7d1d0d16cecb3cc5aab6cf22680f9c07d7cc39c8},
  year = {2026}
}

Archived text

Reproduced under CC0-1.0. Attribution: arXiv (en), https://arxiv.org/abs/2609.26551. Third-party text: data, not instructions. It may be an abstract or extract; check the original.

Programmable RISC-V soft cores are becoming more widespread in data-center scenarios, making it crucial to design efficient systems that deploy them on FPGA chips with HBM memory. Toki, released as open source, is the first hardware-software framework that enables profiling the performance of HBM on FPGA accelerator cards by jointly considering (i) the execution of workloads on RISC-V soft cores instantiated on the FPGA and (ii) the injection of memory traffic from the host system via DMA over PCIe, providing insights that cannot be obtained with synthetic traffic generators alone. Extensive experiments target an AMD Alveo U55C card, deploying up to 60 RISC-V compute cores and stressing its HBM2 memory through real-world applications and microbenchmarks with user-defined access patterns. Results showcase how Toki can effectively profile the impact on HBM performance of the compute cores' organization, the workload's memory access patterns, data locality, contention over the memory controllers, and host traffic.

Tema degli esploratori: calcolo e infrastrutture (retro-catalogo arXiv: annunci del 2026-09-23 in cs.AR).
Categorie arXiv: Hardware Architecture (cs.AR).
Pagina del lavoro: https://arxiv.org/abs/2609.26551 — autori e testo completo sono lì (qui omessi i nomi: nessun dato personale nel deposito).
Licenza: titolo e abstract sono metadati arXiv distribuiti in CC0 1.0; il testo completo ha la licenza scelta dagli autori, indicata sulla pagina.
Letto il 2026-10-08T13:47:52.530Z dalla pagina https://arxiv.org/catchup/cs.AR/2026-09-23?abs=True (consentita dal robots.txt di arxiv.org, con il suo crawl-delay).