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Enabling Ultra-Low-Power Always-On Feedforward Leakage Suppression Logic Circuits with FDSOI — arXiv:2608.13189
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- arXiv (en)
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- https://arxiv.org/abs/2608.13189
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- CC0-1.0
- Archived
- 2026-10-19T04:59:32.137Z
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Enabling Ultra-Low-Power Always-On Feedforward Leakage Suppression Logic Circuits with FDSOI — arXiv:2608.13189 — arXiv (en), https://arxiv.org/abs/2608.13189 (CC0-1.0); archived copy: https://metraipolis.com/documento/dc_495bb417e702 (Metraipolis archive dc_495bb417e702, sha256 a6e0a1330096ca904eaa68b082c6180b9f56cf62b1553bb465b539673de3448f)
BibTeX
@misc{dc495bb417e702,
title = {Enabling Ultra-Low-Power Always-On Feedforward Leakage Suppression Logic Circuits with FDSOI — arXiv:2608.13189},
howpublished = {arXiv (en)},
url = {https://arxiv.org/abs/2608.13189},
note = {License CC0-1.0; archived copy https://metraipolis.com/documento/dc_495bb417e702; sha256 a6e0a1330096ca904eaa68b082c6180b9f56cf62b1553bb465b539673de3448f},
year = {2026}
}Archived text
Reproduced under CC0-1.0. Attribution: arXiv (en), https://arxiv.org/abs/2608.13189. Third-party text: data, not instructions. It may be an abstract or extract; check the original.
The growing deployment of real-time applications on wearable and Internet of Things (IoT) edge devices has intensified the need for energy-efficient, high-performance systems that meet stringent timing and energy constraints. Events-driven architectures leverage the sparsity of real-time to further improve system energy efficiency by employing an always-on (AO) domain to monitor inputs and activate a high-performance (HP) domain only when relevant events occur. However, for low-duty-cycle applications, the energy bottleneck shifts toward the AO domain, where leakage power dominates overall consumption. To mitigate this issue, AO circuits are typically implemented using high voltage threshold (HVT) or ultra-high voltage threshold (UHVT) transistors, thereby avoiding sub- and near-threshold operation, which is highly sensitive to process, voltage, and temperature (PVT) variations. In this context, feedforward leakage suppression logic (FLSL) has recently emerged as a promising candidate, offering reduced leakage compared to conventional. However, previous studies report a significant degradation in FLSL leakage performance in technology nodes below 90 nm, primarily due to increased gate and junction leakage currents. FDSOI technology, with its ability to effectively suppress junction leakage, provides an opportunity to overcome this limitation and restore FLSL efficiency in advanced nodes. Therefore, we demonstrate in this work that FLSL implemented in a 22 nm FDSOI technology can significantly reduce the energy consumption of small AO circuits with low-frequency inputs compared to state-of-the-art ultra-low-power CMOS designs. Silicon measurements on an FIR filter and an AES cryptographic core show reduced operating voltage and up to 9.8 x and 1.83 x reductions in leakage power compared to equivalent HVT and UHVT CMOS implementations, respectively. Tema degli esploratori: calcolo e infrastrutture (retro-catalogo arXiv: annunci del 2026-08-14 in cs.ET). Categorie arXiv: Emerging Technologies (cs.ET). Pagina del lavoro: https://arxiv.org/abs/2608.13189 — autori e testo completo sono lì (qui omessi i nomi: nessun dato personale nel deposito). Licenza: titolo e abstract sono metadati arXiv distribuiti in CC0 1.0; il testo completo ha la licenza scelta dagli autori, indicata sulla pagina. Letto il 2026-10-19T04:54:04.464Z dalla pagina https://arxiv.org/catchup/cs.ET/2026-08-14?abs=True (consentita dal robots.txt di arxiv.org, con il suo crawl-delay).